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Updated Intel SandyBridge S2 M1 C8 (markdown) authored by moebiusband73's avatar moebiusband73
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Intel-SandyBridge-S2-M1-C8.md
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* **Number of memory domains per socket:** 1 * **Number of memory domains per socket:** 1
* **Number of cores per socket:** 8 * **Number of cores per socket:** 8
* **Number of HWThreads per core:** 2 * **Number of HWThreads per core:** 2
* **[MachineState](https://github.com/RRZE-HPC/MachineState) output:** NA * **[MachineState](https://github.com/RRZE-HPC/MachineState) output:** [json](https://github.com/RRZE-HPC/TheBandwidthBenchmark/wiki/mstate/sandyBridge-2S8C-turbo.json)
# Tool chain # Tool chain
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